The present invention relates to a semiconductor image sensor, and more particularly, to a semiconductor image sensor employing a static induction transistor structure, capable of providing a wide linear dynamic range and a high operating speed.
Static induction transistors (hereinafter referred to as "SIT" when applicable) capable of exhibiting nonsaturating current-voltage characteristics have been employed for integrated circuits. Such transistors have been proved experimentally to be suitable for large scale integrated circuits because of their low power consumption. On the other hand, SITs have very wide dynamic ranges and hence are excellent for use in analog circuits. Applications of SITs to solid state image sensors were also proposed, for example, in U.S. patent application Ser. No. 878,441, filed on Feb. 16, 1978, Ser. No. 39,445, filed on May 15, 1979 and Ser. No. 130,775, filed on Mar. 17, 1980. These image sensors have much wider linearity range and higher operating speed than charge coupled image (CCI) sensors.
An SIT is analogous in structure to a field-effect transistor although its channel length is short and the density of impurities in the channel region is low. Specifically, the density of impurities in the channel region is low to such extent that the depletion layer extending from the gate region into the channel region pinches off the channel region without causing breakdown, with or without the aid of the gate voltage. Also, the channel length is made sufficiently short that the length of the potential barrier provided by the pinch-off effect is very short and the height of the barrier is controllable by the drain voltage and that the equivalent resistance from the source electrode to the potential barrier, acting as a negative feedback resistance, is low. As a result, a nonsaturating drain current-voltage characteristic is obtained due to the operational principle of barrier height control by drain (and gate) voltage. An SIT dynamic random access memory (hereinafter referred to as "d-RAM" when applicable) is provided by floating one of the source and the drain regions of each SIT and forming a storage capacitor by the floated source or drain region. In other words, a dynamic memory cell is formed by connecting a capacitor in series to the source or drain region of an SIT. A solid-state image sensor may be constructed by arranging SIT d-RAM array to store optical inputs. A depletion mode SIT image sensor of the back-illumination type was proposed in the above-mentioned U.S. application Ser. No. 130,775.